AMD SB600 Technical Reference Manual page 63

Field Name Bits
LPSC 16
OCIC 17
Reserved 30:18
CRWE 31
Field Name Bits
CCS
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
HcRhStatus - 32 bits - [MEM_Reg : 50h]
Default HCD
0b RW
0b RW
- W
HcRhPortStatus - 32 bits - [MEM_Reg : 50h+4*(1:NDP)]
Default HCD
0 0b RW
HC
R (Read) LocalPowerStatusChange
The Root Hub does not support the local power
status feature; thus, this bit is always read as '0'.
(Write) SetGlobalPower
In global power mode (PowerSwitchingMode=0),
This bit is written to '1' to turn on power to all ports
(Clear)
PortPowerStatus). In per-port power mode, it sets
PortPowerStatus only on ports whose
PortPowerControlMask bit is not set. Writing a '0'
has no effect.
RW
OverCurrentIndicatorChange
This bit is set by hardware when a change has
occurred to the OCI field of this register. The HCD
clears this bit by writing a '1'. Writing a '0' has no
effect.
Reserved
(Write) ClearRemoteWakeupEnable
R
Writing a '1' clears DeviceRemoveWakeupEnable.
Writing a '0' has no effect.
HC
RW (Read) CurrentConnectStatus
This bit reflects the current state of the downstream
port.
0 = No device connected
1 = Device connected
(Write) ClearPortEnable
The HCD writes a '1' to this bit to clear the
PortEnableStatus bit.
Writing a '0' has no effect. The
CurrentConnectStatus is not affected by any write.
Note: This bit is always read '1b' when the attached
device is non-removable
(DeviceRemoveable[NDP]).
OCHI USB 1.1 and EHCI USB 2.0 Controllers
Proprietary
Description
Description
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