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Data Buffer – RW - 64 bits - [DBug_Reg : DBase + 08h/0Ch]
Field Name
Bits
Data Buffer
63:0
Device Address – RW - 32 bits - [DBUG_Reg : DBase + 10h]
Field Name
Bits
USB Endpoint
3:0
Reserved
7:4
USB Address
14:8
Reserved
31:15
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Default
00000000
The least significant byte is accessed at offset 08h and the most
_
significant byte is accessed at offset 0Fh. Each byte in Data Buffer can
00000000
be individually accessed. Data Buffer must be written with data before
h
software initiates a write request. For a read request, Data Buffer
contains valid data when Done is set, Error/Good# is cleared, and Data
Length specifies the number of bytes that are valid. Reset default =
undefined.
Default
1h
4-bit field that identifies the endpoint used by the controller for all Token
PID generation.
Reserved
7Fh
7-bit field that identifies the USB device address used by the controller
for all Token PID generation.
Reserved
Description
Description
OCHI USB 1.1 and EHCI USB 2.0 Controllers
Proprietary
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