AMD SB600 Technical Reference Manual page 160

Field Name
MwaitEnable register
This register is used only in the P4 system.
Field Name
Mwait_any_smi_sts
Mwait_2cpu_smi_sts
Mwait_4cpu_smi_sts
Reserved
MwaitSmiSts register
This register is used only in the P4 system.
Field Name
TAlertFanEn
ProcHotFanEn
Fan1En
Fan2En
Reserved
SpkrEn
Fan0En
Reserved
Options_0 register
Field Name
Reserved
IsAmd
PCI_Active_enable
UseCpuRst
ProcHotStsEn
Reserved
UsbPmeEnable
Reserved
Options_1 register
Field Name
Shadow_SCI
Reserved
Shadow_SCI register
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
MwaitEnable - RW – 8 bits - [PM_Reg: 5Eh]
Bits Default
MwaitSmiSts - RW – 8 bits - [PM_Reg: 5Fh]
Bits Default
0 0b This bit indicates that SMI# is generated when any CPU is in
mwait state
1 0b This bit indicates that for 2 CPU system (dual core, non HT)
SMI# is generated when both CPUs are in mwait state
2 0b This bit indicates that for 4 CPU system (dual core, HT) SMI#
is generated when all 4 CPUs are in mwait state
7:3 00h
Options_0 - RW – 8 bits - [PM_Reg: 60h]
Bits Default
0 0b Set this bit to put all fans to full speed if TALERT# is asserted
1 0b Set this bit to put all fans to full speed if PROCHOT# is
asserted
2 0b Setting this bit will configure GPIO48 pin to be FAN1 output
3 0b Setting this bit will configure GPIO49 pin to be FAN2 output
4 0b
5 0b Setting this bit will configure GPIO2 to be speaker output
6 0b Setting this bit will configure GPIO3 to be FAN0 output
7 0b
Options_1 - RW – 8 bits - [PM_Reg: 61h]
Bits Default
0 0b
1 0b Set to enable NB/SB handshake during IOAPIC interrupt for
AMD K6 or K7 class; Clear for other CPU.
2 0b BIOS should set this bit in order to monitor BM_STS pin from
NB (the pin is called BMREQ# on SB) and bus mastering
from the SB itself.
3 1b If this bit is not set, then system reset will cause INIT# instead
of CPURST#.
4 0b Set to enable PROCHOT# to generate TwarnStatus and
thermal throttle
5 0b
6 0b USB PME enable
7 0b
Shadow_SCI- R – 8 bits - [PM_Reg: 62h]
Bits Default
0 0b SCI output
7:1 00h
Description
Description
Description
Description
Description
SMBus Module and ACPI Block (Device 20, Function 0)
Proprietary Page 160