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Pin Name
Multi-function
(Note 1)
Selection
GPIO[60:53]/
PM2 IO Reg57h[Bit
7:6] [Bit5:4] Bit[3:2] Bit
VIN[7:0]
1:0] Reg56h[Bit 7:6]
[Bit5:4] Bit[3:2] Bit 1:0]
00: GPIO
01/10/11: VIN
GPIO[63:61]/
PM2 IO Reg42h[Bit
5:4] [Bit 3:2] [Bit 1:0]
TEMPIN[2:0]
00: GPIO
01/10/11: TEMPIN
GPIO64/
PM2 IO Reg42h[Bit
7:6]
TEMPIN3/
00: GPIO or TALERT#
TALERT#
01/10/11: TEMPIN3
GPIO65/
PCIB Reg64h[Bit 8]
BMREQ#/
0: GPIO or BMREQ#
REQ5#
1: REQ5#
SMBus Reg64h[Bit 5]
0: GPIO
1: BMREQ#
GPIO66/
PM IO Reg68h[Bit 5]
LLB#
0: GPIO
1: LLB#
GPIO67/
SMBus RegACh[Bit 3]
SATA_ACT#
0: SATA_ACT#
1: GPIO
GPIO68/
PCIB Reg64h[Bit 8]
LDRQ1#/
0: GPIO if not used by
LPC
GNT5#
1: GNT5#
GPIO69/
GPIO if internal RTC
RTC_IRQ#
GPIO70/
SMBus Reg5Bh[Bit 4]
REQ3#
0: REQ3#
1: GPIO
GPIO71/
SMBus Reg5Bh[Bit 5]
REQ4#
0: REQ4#
1: GPIO
GPIO72/
SMBus Reg5Bh[Bit 6]
GNT#3
0: GNT3#
1: GPIO
GPIO73/
SMBus Reg5Bh[Bit 7]
GNT4#
0: GNT4#
1: GPIO
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Output Enable
Input if GPI
(On SMBus
(On SMBus
Controller)
Controller)
Bus 00h/ Dev14h/
Bus 00h/
Fun00
Dev14h/ Fun00
Reg 54h[Bit 7:4]
Reg 55h[Bit 3:0]
Reg 53h[Bit 3:0]
Reg 52h[Bit 7:4]
0: Output
1: Input (Tri-state)
Reg 56h[Bit 6:4]
Reg 57h[Bit 2:0]
0: Output
1: Input (Tri-state)
Reg 56h[Bit 7]
Reg 57h[Bit 3]
0: Output
1: Input (Tri-state)
Reg 7Eh[Bit 4]
Reg 7Fh[Bit 0]
0: Output
1: Input (Tri-state)
Reg 7Eh[Bit 5]
Reg 7Fh[Bit 1]
0: Output
1: Input (Tri-state)
Reg ACh[Bit 1]
Reg ACh[Bit 2]
0: Output
1: Input (Tri-State)
Reg 7Eh[Bit 6]
Reg 7Fh[Bit 2]
0: Output
1: Input (Tri-State)
Reg 7Eh[Bit 7]
Reg 7Fh[Bit 3]
0: Output
1: Input (Tri-State)
Reg 5Ah[Bit 4]
Reg 5Bh[Bit 0]
0: Output
1: Input (Tri-state)
Reg 5Ah[Bit 5]
Reg 5Bh[Bit 1]
0: Output
1: Input (Tri-state)
Reg 5Ah[Bit 6]
Reg 5Bh[Bit 2]
0: Output
1: Input (Tri-state)
Reg 5Ah[Bit 7]
Reg 5Bh[Bit 3]
0: Output
1: Input (Tri-state)
Proprietary
Output if GPO
Power
(On SMBus
Domain
Controller)
Bus 00h/
Dev14h/ Fun00
Reg 54h[Bit
S0
3:0]
Reg 52h[Bit
3:0]
Reg 56h[Bit
S0
2:0]
Reg 56h[Bit 3]
S0
Reg 7Eh[Bit 0]
S0
Reg 7Eh[Bit 1]
S5
Reg ACh[Bit 0]
S0
Reg 7Eh[Bit 2]
S0
Reg 7Eh[Bit 3]
S5
Reg 5Ah[Bit 0]
S0
Reg 5Ah[Bit 1]
S0
Reg 5Ah[Bit 2]
S0
Reg 5Ah[Bit 3]
S0
GPIO/GPOC
Page 281
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