AMD SB600 Technical Reference Manual page 98

Field Name
VendorID
Vendor ID register: Vendor Identification
Field Name
DeviceID
Device ID register: Device Identification Number
Field Name
I/O Space
Memory Space
Bus Master
Special Cycle
Memory Write &
Invalidate Enable
VGA Palette Snoop
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Register Name
IDE_GPIO_In
GPIO_48_47_46_37_Cntrl
GPIO_12_to_4_Cntrl
SATA_Cntrl
SataIntMap
MSI_Mapping_Capability
PcilntGpio
UsbIntMap
IoDrvSth
I2CbusConfig
I2CCommand
I2CShadow1
I2Cshadow2
I2CBusRevision
MSI_Weight
AB_REG_BAR
WakeIoAddr
MwaitID
MwaitSts
ExtendedAddrPort
ExtendedDataPort
VendorID - R - 16 bits - [PCI_Reg: 00h]
Bits Default
15:0 1002h Vendor ID
DeviceID - R - 16 bits - [PCI_Reg: 02h]
Bits Default
31:16 4385h Device ID
Command- RW - 16 bits - [PCI_Reg: 04h]
Bits Default
0 1b This bit controls a device's response to IO space accesses. A
value of 1 enables it and a value of 0 disables it. Since this
module does claim certain legacy IO cycles, this bit is default
to 1.
1 1b This bit controls a device's response to memory space
accesses. A value of 1 enables it and a value of 0 disables it.
Since this module does claim certain memory cycles if BIOS is
strapped to the PCI bus, this bit is default to 1.
2 0b A value of 0 disables the device from generating PCI
accesses. A value of 1 allows it to behave as a bus master.
ACPI/SMBus does not have PCI master and so it is always 0.
[Read-only]
3 0b A value of 0 causes the devices to ignore all special cycle
operations. A value of 1 allows the device to monitor Special
Cycle operations. This module does not respond to special
cycle and so this is hardcoded to 0
4 0b This bit is an enable bit for using the Memory Write and
Invalidate command. This module will not generate this
command and so it is always 0. [Read-only]
5 0b This bit controls how VGA compatible and graphics devices
handle accesses to VGA pallette registers. This does not
apply to this module and so it is always 0. [Read-only]
Description
Description
Description
SMBus Module and ACPI Block (Device 20, Function 0)
Proprietary
Configuration Offset
A4h
A6h
A8h
ACh
AFh
B0h
BCh
BEh
C0h
D2h
D3h
D4h
D5h
D6h
E0h
F0h
F4h
F6h
F7h
F8h
FCh
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