AMD SB600 Technical Reference Manual page 4

2.5 AC '97 Controller Functional Descriptions ................................................................................. 198
2.5.1 Audio Registers (Device 20, Function 5) ............................................................................................198
2.5.1.1 PCI Configuration Registers ............................................................................................................................... 198
2.5.1.2 Audio Memory Mapped Registers ...................................................................................................................... 203
2.5.2 Modem Registers (Device 20, Function 6) .........................................................................................213
2.5.2.1 PCI Configuration Registers ............................................................................................................................... 213
2.5.2.2 Modem Memory Mapped Registers.................................................................................................................... 218
2.6 HD Audio Controllers Registers ................................................................................................. 227
2.6.1 HD Audio Controller PCI Configuration Space Registers (Device 20 Function 2) ..............................227
2.6.2 HD Audio Controller Memory Mapped Registers ...............................................................................232
3 Register Descriptions: PCI Bridges ................................................................... 249
3.1 LPC ISA Bridge (Device 20, Function 3).................................................................................... 249
3.1.1 Programming Interface.......................................................................................................................249
3.1.2 PCI Configuration Registers...............................................................................................................249
3.1.3 SPI ROM Controller Registers ...........................................................................................................260
3.1.4 Features of the LPC Block .................................................................................................................264
3.2 Host PCI Bridge Registers (Device 20, Function 4)................................................................... 265
4 Register Descriptions: General Purpose Functions/Interrupt Controllers/Support
Function Pins............................................................................................................. 277
4.1 GPIO/GPOC............................................................................................................................... 277
4.1.1 GPIO ..................................................................................................................................................277
4.1.2 GPOC ................................................................................................................................................282
4.2 GEVENT/GPE/GPM/ExtEvent ................................................................................................... 283
4.2.1 GEVENT as GPIO..............................................................................................................................283
4.2.2 General Purpose Event (GPE) ...........................................................................................................283
4.2.3 GPM as GPIO ....................................................................................................................................286
4.2.3.1 GPM Pins as Input.............................................................................................................................................. 286
4.2.3.2 GPM pins as Output ........................................................................................................................................... 287
4.2.4 ExtEvent.............................................................................................................................................287
4.2.4.1 ExtEvent as GPIO............................................................................................................................................... 287
4.2.4.2 ExtEvent to Generate SMI# ................................................................................................................................ 287
4.3 THRMTRIP/TALERT .................................................................................................................. 288
4.3.1 Thermal Trip - THRMTRIP ................................................................................................................288
4.3.2 Temperature Alert - TALERT.............................................................................................................288
4.4 Real Time Clock (RTC) .............................................................................................................. 289
4.5 IOXAPIC Registers..................................................................................................................... 296
4.5.1 Direct Access Registers .....................................................................................................................296
4.5.2 Indirect Access Registers...................................................................................................................297
Appendix A: AC97 Audio FAQs ............................................................................... 299
Appendix B: Revision History .................................................................................. 300
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual Proprietary
List of Figures
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