Address Maps; Table 25 Processor Memory Address Map - Motorola PPC/CPCI-690 Reference Manual

Address Maps

Address Maps
Caution
6 - 4
The address map is determined by the system controller's internal struc-
ture. Each address window must have an address space larger than
1 MByte.
Board malfunction
Accesses to the reserved address areas and overlapping of address win-
dows result in unpredictable board behavior.
Only access address areas not marked as reserved. Make sure that
address windows do not overlap.
Table 25: Processor Memory Address Map
Base Address End Address
00000000 7FFFFFFF
16
80000000 EF7FFFFF
16
EF800000 EFFFFFFF
16
F0000000 F0000007
16
F0000008 F00FFFFF
16
F0100000 F0107FFF
16
F0108000 F01FFFFF
16
F0200000 F020000F
16
F0200000 F0200001
16
F0200008 F0200009
16
F0200010 F0FFFFFF
16
F1000000 F100FFFF
16
F1010000 F3FFFFFF
16
F4000000 F7FFFFFF
16
F8000000 FFEFFFFF
16
FFF00000 FFFFFFFF
16
1) Contains up to four PCI memory windows for each PCI bus segment
2) Contains one PCI I/O window for each PCI bus segment
3) Interface of IPMI controller
4) Access to boot flash 1 and 2 is decoded by external logic
Size
2048 MBytes
16
1784 MBytes
16
8 MBytes
16
8 Bytes
16
-
16
32 KBytes
16
-
16
16 Bytes
16
2 Bytes
16
2 Bytes
16
-
16
64 KBytes
16
-
16
64 MBytes
16
-
16
1 MBytes
16
Maps and Registers
Device Bus Width
Main memory 64 bit
1)
PCI memory 64 bit
2)
PCI I/O space 64 bit
Board registers 8 bit
Reserved -
RTC/NVRAM 8 bit
Reserved -
IPMI controller 8 bit
3)
KCS0 8 bit
3)
KCS1 8 bit
Reserved -
Discovery registers 64 bit
Reserved -
User flash 8 bit
Reserved -
4)
Boot flash 8 bit
PPC/CPCI-690