Table of Contents
Advertisement
PWM
Notes on Changing the PWM Setting
Values................................................ 531
PWM Control 0 Register
PWM Control 0 Register................................... 524
PWM1 and PWM2 Compare Registers
PWM1 and PWM2 Compare Registers............... 526
PWM1 Select Registers
PWM1 Select Registers .................................... 527
PWM2 Select Registers
PWM2 Select Registers .................................... 529
R
RAM Area
RAM Area......................................................... 28
Rate and Data Register
Rate and Data Register (URD)........................... 320
Rate and Data Register (URD) Contents ............. 321
RCR
Reception Complete Register (RCR) .................. 487
RDR
Bit Configuration of Reception and Transmission Data
Registers
(RDR2/RDR3 and TDR2/TDR3) .......... 357
Reception Data Register (RDR2/RDR3) ............. 357
Receive and Transmit Error Counters
Receive and Transmit Error Counters
(RTEC) .............................................. 476
Receive and Transmit Error Counters
(RTEC) Contents................................. 476
Receive Operation
Flag Set Timings for a Receive Operation
(in Mode 2)......................................... 331
Flag Set Timings for a Receive Operation (in Mode0,
Mode1, Mode3) .................................. 330
Status Flag during Transmit and Receive
Operation ........................................... 333
Receive Overrun
Receive Overrun .............................................. 505
Receive Overrun Register
Receive Overrun Register (ROVRR).................. 489
Received Message
Storing Received Message ................................ 504
Reception
Completing Reception ...................................... 506
Procedure for Reception by Message Buffer
(x)...................................................... 512
Reception and Transmission Data Register
Bit Configuration of Reception and Transmission Data
Registers
(RDR2/RDR3 and TDR2/TDR3) .......... 357
Reception Complete Register
Reception Complete Register (RCR) .................. 487
706
Reception Data Register
Reception Data Register (RDR2/RDR3)............. 357
Reception Flowchart
Reception Flowchart of the CAN Controller ....... 507
Reception Interrupt
Reception Interrupt Generation and Flag Set
Timing............................................... 369
Reception Interrupt Enable Register
Reception Interrupt Enable Register (RIER) ....... 490
Register
16-bit Reload Timer Register ............................ 226
8/10-bit A/D Converter Registers ...................... 286
8/16-bit PPG Registers ..................................... 254
I/O Port Registers ............................................ 171
2
I
C Interface Registers ..................................... 408
Output Compare Register ................................. 204
Serial I/O Registers .......................................... 439
Sound Generator Registers................................ 535
Stepping Motor Controller Registers.................. 523
UART0, UART1 Registers ............................... 314
UART2, UART3 Registers ............................... 349
Register Bank
Register Bank .................................................... 45
Register Bank Pointer
Register Bank Pointer (RP) ................................. 42
Reload Register
Reload Register (PRLL/PRLH) ......................... 261
Reload Value
Relationship between 8/16-bit PPG Reload Value and
Pulse Width........................................ 263
Remote Frame
Processing for Reception of Data Frame and Remote
Frame ................................................ 505
Remote Frame Receiving Wait Register
Remote Frame Receiving Wait Register
(RFWTR)........................................... 483
Remote Request Receiving Register
Remote Request Receiving Register
(RRTRR) ........................................... 488
Reset
Causes of a Reset ............................................. 126
Notes about Reset Cause Bits............................ 134
Overview of Reset Operation ............................ 131
Reset Cause Bits .............................................. 133
Status of Pins during a Reset ............................. 136
Reset Cause Bits
Notes about Reset Cause Bits............................ 134
Reset Cause Bits .............................................. 133
Reset Causes
Reset Causes and Oscillation Stabilization Wait
Times ................................................ 128
Restarting Erasing
Restarting Erasing of Flash Memory Sectors ...... 583
Advertisement
Table of Contents
