Fujitsu MB90390 Series Hardware Manual page 11

CHAPTER 9 MEMORY ACCESS MODES .................................................................... 163
9.1 Outline of Memory Access Modes .................................................................................................. 164
9.2 Mode Pins of Memory Access Mode .............................................................................................. 165
9.3 Mode Data of Memory Access Mode .............................................................................................. 166
CHAPTER 10 I/O PORTS ................................................................................................ 169
10.1 I/O Ports .......................................................................................................................................... 170
10.2 I/O Port Registers ........................................................................................................................... 171
10.2.1 Port Data Register ..................................................................................................................... 172
10.2.2 Data Direction Register ............................................................................................................. 174
10.2.3 Analog Input Enable Register .................................................................................................... 175
10.2.4 Input Level Select Register ........................................................................................................ 176
CHAPTER 11 TIME-BASE TIMER .................................................................................. 177
11.1 Outline of Time-base Timer ............................................................................................................ 178
11.2 Time-base Timer Control Register .................................................................................................. 179
11.3 Operations of Time-base Timer ...................................................................................................... 181
CHAPTER 12 WATCHDOG TIMER ................................................................................ 183
12.1 Outline of Watchdog Timer ............................................................................................................. 184
12.2 Watchdog Timer Operation ............................................................................................................. 187
CHAPTER 13 16-BIT I/O TIMER ..................................................................................... 191
13.1 Outline of 16-Bit I/O Timer .............................................................................................................. 192
13.2 16-Bit I/O Timer Registers .............................................................................................................. 194
13.3 16-bit Free-run Timer ...................................................................................................................... 196
13.3.1 Data Register ............................................................................................................................. 197
13.3.2 Control Status Register ............................................................................................................. 198
13.3.3 16-bit Free-run Timer Operation ................................................................................................ 201
13.4 Output Compare ............................................................................................................................. 203
13.4.1 Output Compare Register .......................................................................................................... 204
13.4.2 Control Status Register of Output Compare .............................................................................. 205
13.4.3 16-bit Output Compare Operation ............................................................................................. 210
13.5 Input Capture .................................................................................................................................. 215
13.5.1 Input Capture Register Details .................................................................................................. 216
13.5.2 16-bit Input Capture Operation .................................................................................................. 221
CHAPTER 14 16-BIT RELOAD TIMER (WITH EVENT COUNT FUNCTION) ................ 223
14.1 Outline of 16-Bit Reload Timer (with Event Count Function) .......................................................... 224
14.2 16-Bit Reload Timer (with Event Count Function) .......................................................................... 226
14.2.1 Timer Control Status Register (TMCSR) ................................................................................... 227
14.2.2 Register Layout of 16-bit Timer Register (TMR)/16-bit Reload Register (TMRLR) ................... 230
14.3 Internal Clock and External Clock Operations of 16-bit Reload Timer ........................................... 231
14.4 Underflow Operation of 16-bit Reload Timer .................................................................................. 233
14.5 Output Pin Functions of 16-bit Reload Timer .................................................................................. 234
14.6 Counter Operation State ................................................................................................................. 235
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