Fujitsu MB90390 Series Hardware Manual page 503

■ Last Event Indicator Register (LEIR) Contents
Table 23.6-4 Function of Each Bit of the Last Event Indicator Register
Bit name
NTE:
Node status
bit7
transition event
bit
TCE:
Transmit
bit6
completion event
bit
RCE:
Receive
bit5
completion event
bit
bit4 Undefined
MBP3 to MBP0:
bit3 to bit0 Message buffer
pointer bits
When this bit is "1", node status transition is the last event.
This bit is set to "1" at the same time the NT bit of the control status register (CSR) is
set.
This bit is also set to "1" irrespective of the setting of the node status transition interrupt
enable bit (NIE) of CSR.
Writing "0" to this bit sets the NTE bit to "0". Writing "1" to this bit is ignored.
"1" is read when a Read Modify Write (RMW) instruction is executed.
When this bit is "1", it indicates that transmit completion is the last event.
This bit is set to "1" at the same time as any one of the bits of the transmit completion
register (TCR). This bit is also set to "1", irrespective of the settings of the bits of the
transmit interrupt enable register (TIER).
Writing "0" sets this bit to "0". Writing "1" to this bit is ignored.
"1" is read when a Read Modify Write (RMW) instruction is performed.
When this bit is set to "1", the MBP3 to MBP0 bits are used to indicate the message
buffer number completing the transmit operation.
When this bit is "1", it indicates that receive completion is the last event.
This bit is set to "1" at the same time as any one of the bits of the receive complete
register (RCR). This bit is also set to "1" irrespective of the settings of the bits of the
receive interrupt enable register (RIER).
Writing "0" sets this bit to "0". Writing "1" to this bit is ignored.
"1" is read when a Read Modify Write (RMW) instruction is performed.
When this bit is set to "1", the MBP3 to MBP0 bits are used to indicate the message
buffer number completing the receive operation.
When the TCE or RCE bit is set to "1", these bits indicate the corresponding numbers of
the message buffers (0 to 15). If the NTE bit is set to 1, these bits have no meaning.
Writing "0" sets these bits to "0"s. Writing "1" to these bits is ignored.
"1"s are read when a Read Modify Write (RMW) instruction is performed.
If LEIR is accessed within an CAN interrupt handler, the event causing the interrupt is
not necessarily the same as indicated by LEIR. In the time from interrupt request to the
LEIR access by the interrupt handler there may occur other CAN events.
CHAPTER 23 CAN CONTROLLER
Function
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