Fujitsu MB90390 Series Hardware Manual page 208

CHAPTER 11 TIME-BASE TIMER
Table 11.2-1 Function Description of Each Bit of the Time-base Timer Control Register
Bit name
bit15 Reserved bit
bit14 Undefined bit
bit13 Undefined bit
bit12 TBIE
bit11 TBOF
bit10 TBR
bit9, bit8 TBC1/TBC0
Table 11.2-2 shows the settings for TBC1 and TBC0:
Table 11.2-2 Selecting the Time-base Timer Interval
TBC1
0
0
1
1
180
This is a reserved bit. When writing data to the TBTC register ensure that "1" is
written to this bit.
This bit is used to enable interval interrupts based on the time-base timer. Writing
"1" to this bit enables interrupts, and writing "0" disables interrupts. This bit is
initialized to "0" upon a reset. This bit is readable and writable.
This is an interrupt request flag for the time-base timer. While the TBIE bit is "1",
an interrupt request is issued when "1" is written to TBOF. This bit is set to "1" for
each interval specified with the TBC1 and TBC0 bits.
This bit is cleared by writing "0", transition to stop or a reset. Writing "1" has no
effect.
"1" is always read by a read-modify-write (RMW) instruction.
This bit clears all bits of the time-base timer counter to "0".
Writing "0" clears the time-base counter.
Writing "1" has no effect.
"1" is always read from this bit.
These bits are used to set the time-base timer interval.
Table 11.2-2 lists the specifiable intervals.
TBC0
0
1
0
1
Function
−
−
Interval at 4 MHz source oscillation
1.024 ms
4.096 ms
16.384 ms
131.072 ms