Serial I/O Operation - Fujitsu MB90390 Series Hardware Manual

CHAPTER 22 SERIAL I/O
22.4

Serial I/O Operation

The extended serial I/O consists of the serial mode control status register (SMCS) and
shift register (SDR), and is used for input and output of 8-bit serial data.
■ Serial I/O Operation
The bits in the shift register are serially output via the serial output pin (SOT4 pin) at the falling edge of the
serial shift clock (external clock or internal clock). The bits are serially input to the shift register (SDR) via
the serial input pin (SIN4 pin) at the rising edge of the serial shift clock. The shift direction (transfer from
MSB first or LSB first) is specified by the direction specification bit (BDS) of the serial mode control
status register (SMCS).
At the end of serial data transfer, this block is stopped or stands by for a read or write of the data register
according to the MODE bit of the serial mode control status register (SMCS). To start transfer from the
stop or standby state, follow the procedure below.
• To resume operation from the stop state, write "0" to the STOP bit and "1" to the STRT bit. (The STOP
and STRT bits can be set simultaneously.)
• To resume operation from the serial shift data register Read/Write standby state, read or write to the data
register.
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