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CHAPTER 13 16-BIT I/O TIMER
■ Output Compare Timing
In output compare operation, a compare match signal is generated when the free-run timer value matches
the specified compare register value. The output value can be reversed and an interrupt can be issued. The
output reverse timing upon a compare match is synchronized with the counter timing.
●
Compare operation upon update of compare register
When the compare register is updated, comparison with the counter value is not performed.
●
Interrupt timing
φ
Counter value
Compare register
value
Compare match
Interrupt
●
Output pin change timing
Counter value
Compare register
value
Compare match
signal
Pin output
214
Figure 13.4-11 Interrupt Timing
N
Figure 13.4-12 Output Pin Change Timing
NN+1
N+1
N+1
N
N
N
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