Fujitsu MB90390 Series Hardware Manual page 100

CHAPTER 3 INTERRUPTS
CPU
Note:
The area that can be specified by IOA is between "000000
The area that can be specified by BAP is between "000000
The maximum transfer count that can be specified by DCT is 65536.
■ Structure
2
EI OS is handled by the following four sections:
Internal resources
Interrupt enable and request bits: Used to control interrupt requests from resources.
Interrupt controller
ICR: Assigns interrupt levels, determines the priority levels of simultaneously interrupt requests, and
CPU
I and ILM: Used to compare the interrupt request and current interrupt levels and to identify the
Microcode: EI
RAM
Descriptor: Describes the EI
72
Figure 3.7-1 Outline of Extended Intelligent I/O Service
Memory space
by IOA
I/O register
➂
➂
by BAP
➃
2
selects the EI OS operation.
interrupt enable status
2
OS processing step
2
OS transfer information.
•••••••••••••••
by ICS
➁
ISD
➀ I/O requests transfer.
➁ The interrupt controller selects the
descriptor.
➂ The transfer source and destination
by
Buffer
are read from the descriptor.
DCT
➃ Data is transferred between I/O and
memory.
H
H
Peripheral
I/O register
➀
Interrupt request
Interrupt control register
Interrupt controller
" and "00FFFF ".
H
" and "FFFFFF ".
H