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CHAPTER 23 CAN CONTROLLER
23.6.13
Transmission Interrupt Enable Register (TIER)
This register enables or disables the transmission interrupt by the message buffer (x).
The transmission interrupt is generated at transmission completion (when TCx of the
transmission complete register (TCR) is "1").
■ Transmission Interrupt Enable Register (TIER)
Figure 23.6-16 Configuration of the Transmission Interrupt Enable Register (TIER)
Address:
CAN0: 00370F
CAN1: 00390F
CAN2: 003B0F
CAN3: 003D0F
CAN4: 003F0F
Address:
CAN0: 00370E
CAN1: 00390E
CAN2: 003B0E
CAN3: 003D0E
CAN4: 003F0E
[bit15 to bit0] TIER15 to TIER0:
"0": Transmission interrupt disabled.
"1": Transmission interrupt enabled.
486
bit
15
14
13
12
11
H
TIE15 TIE14 TIE13 TIE12 TIE11 TIE10 TIE9 TIE8
H
H
R/W R/W R/W R/W
R/W
H
H
bit
7
6
5
4
3
H
TIE7 TIE6 TIE5 TIE4 TIE3 TIE2 TIE1 TIE0
H
H
R/W R/W R/W R/W
R/W
H
H
10
9
8
TIERn (upper)
Initial value
0 0 0 0 0 0 0 0
R/W
R/W R/W
2
1
0
TIERn (lower)
Initial value
0 0 0 0 0 0 0 0
R/W
R/W R/W
B
B
n = 0, 1, 2, 3, 4
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