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Table D-1 Interrupt Vectors (2/2)
Software
Vector
interrupt
address L
instruction
FFFFA0
INT 23
FFFF9C
INT 24
FFFF98
INT 25
FFFF94
INT 26
INT 27
FFFF90H
FFFF8C
INT 28
FFFF88
INT 29
FFFF84
INT 30
FFFF80
INT 31
FFFF7C
INT 32
FFFF78
INT 33
FFFF74
INT 34
FFFF70
INT 35
FFFF6C
INT 36
FFFF68
INT 37
FFFF64
INT 38
INT 39
FFFF60H
FFFF5C
INT 40
FFFF58
INT 41
FFFF54
INT 42
FFFF50
INT 43
.
.
.
.
.
.
FFFC04
INT 254
FFFC00
INT 255
Vector
Vector
address M
address H
FFFFA1
FFFFA2
H
H
FFFF9D
FFFF9E
H
H
FFFF99
FFFF9A
H
H
FFFF95
FFFF96
H
H
FFFF91H
FFFF92H
FFFF8D
FFFF8E
H
H
FFFF89
FFFF8A
H
H
FFFF85
FFFF86
H
H
FFFF81
FFFF82
H
H
FFFF7D
FFFF7E
H
H
FFFF79
FFFF7A
H
H
FFFF75
FFFF76
H
H
FFFF71
FFFF72
H
H
FFFF6D
FFFF6E
H
H
FFFF69
FFFF6A
H
H
FFFF65
FFFF66
H
H
FFFF61
FFFF62
H
FFFF5D
FFFF5E
H
H
FFFF59
FFFF5A
H
H
FFFF55
FFFF56
H
H
FFFF51
FFFF52
H
H
.
.
.
FFFC05
FFFC06
H
H
FFFC01
FFFC02
H
H
Mode
register
Unused
H
Unused
H
Unused
H
Unused
H
Unused
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
Unused
H
.
.
.
.
.
.
Unused
H
Unused
H
APPENDIX D List of Interrupt Vectors
Interrupt
Hardware interrupt
No.
#23
16-bit reload timer 0
#24
16-bit reload timer 1
#25
Input capture 0/1
#26
Output compare 0/1
Input capture 2/3 / Output
#27
compare 6
#28
Output compare 2/3
Input capture 4/5 / Output
#29
compare 7
#30
Output compare 4/5 / (I
#31
A/D converter
I/O timer 0/1
#32
watch timer
#33
Serial I/O
#34
Sound generator
#35
UART0 RX
#36
UART0 TX
#37
UART1 RX
#38
UART1 TX
#39
UART3 RX / (UART2 RX)
#40
UART3 TX / (UART2 TX)
#41
Flash Memory
#42
Delayed interrupt
#43
None
.
.
.
#254
None
#255
None
2
C)
.
.
.
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