Dtp/External Interrupt Registers - Fujitsu MB90390 Series Hardware Manual

17.2

DTP/External Interrupt Registers

The DTP/external interrupts has the following three types of registers:
• Interrupt/DTP enable register (ENIR: Interrupt request enable register)
• Interrupt/DTP flag (EIRR: External interrupt request register)
• Request level setting register (ELVR: External level register)
■ Interrupt/DTP Enable Register (ENIR: Interrupt Request Enable Register)
ENIR
Address : 000030
ENIR enables the function to issue a request to the interrupt controller using a device pin as an external
interrupt/DTP request input. A pin corresponding to a "1" bit of this register is used as an external interrupt/
DTP request input. A pin corresponding to a "0" bit holds the external interrupt/DTP request input cause,
but does not issue a request to the interrupt controller.
Note:
Clear the corresponding DTP/external interrupt source bit (EIRR: ER) right before DTP/external
interrupt is allowed (ENIR: EN = 1).
■ Interrupt/DTP Flags (EIRR: External Interrupt Request Register)
EIRR
Address : 000031
The EIRR indicates the presence of external interrupt/DTP requests at the pins corresponding to the "1" bits
of this register. Writing "0" to a bit of this register clears the corresponding request flag. Writing "1" has no
effect. "1" is always read from this register by a read-modify-write (RMW) instruction.
7 6
bit
EN7 EN6 EN5
H
R/W R/W R/W
bit 15 14 13
ER7 ER6 ER5
H
R/W R/W R/W
CHAPTER 17 DTP/EXTERNAL INTERRUPTS
5 4 3
EN4 EN3 EN2
R/W R/W R/W
12 11 10
ER4 ER3 ER2
R/W R/W R/W
2 1 0 Initial value
EN1 EN0 00000000
R/W R/W
9 8 Initial value
ER1 ER0 XXXXXXXX
........
R/W R/W
The objects differ
B
B
for R/W.
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