Fujitsu MB90390 Series Hardware Manual page 496

CHAPTER 23 CAN CONTROLLER
■ Control Status Register (CSR-lower) Contents
Table 23.6-1 Function of Each Bit of the Control Status Register (Lower)
Bit name
TOE:
bit7 Transmit output
enable bit
bit6 to bit3 Undefined
NIE:
bit2 Node status
transition flag bit
bit1 Reserved bit
HALT:
bit0 Bus operation
stop bit
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Writing "1" to this bit switches from a general-purpose port pin to a transmit pin of the
CAN controller.
"0": General-purpose port pin
"1": Transmit pin of CAN controller
This bit enables or disables a node status transition interrupt (when NT = 1).
"0": Node status transition interrupt disabled
"1": Node status transition interrupt enabled
This is a reserved bit. Do not write "1" to this bit.
This bit controls the bus halt. The halt state of the bus can be checked by reading this bit.
Writing to this bit
"0": Cancels bus halt
"1": Halt bus
Reading this bit
"0": Bus operation not in stop state
"1": Bus operation in stop state
Note :
Before writing "0" to this bit while node status is "Bus Off", make sure that this bit is
"1".
Example program:
switch ( IO_CANCT0.CSR.bit.NS )
{
case 0 : /* error active */
break;
case 1 : /* warning */
break;
case 2 : /* error passive */
break;
default : /* bus off */
for ( i=0; ( i <= 500 ) && ( IO_CANCT0.CSR.bit.HALT == 0); i++);
IO_CANCT0.CSR.word = 0x0084; /* HALT = 0 */
break;
}
* The variable "i" is used for fail-safe.
Function