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CHAPTER 8 LOW-POWER CONTROL CIRCUIT
8.7
Status of Pins in Standby Mode and during Reset
The status of pins in the standby mode and during reset are described for the single
chip mode.
■ Status of Each Pin in the Single Chip Mode
Table 8.7-1 lists the status of each pin in the single chip mode.
Table 8.7-1 Status of Each Pin in the Single Chip Mode
Pin name
P00 to P07
P10 to P17
P20, P21
P30 to P37
P40 to P45
P50 to P57
P60 to P67
P70 to P77
P80 to P87
P90 to P97
PA0 to PA7
PB0 to PB7
P46, P47,
P22 to P27
*1: These pins are "Input enabled" in stop mode/time-base timer mode only if the corresponding bit of
the ENIR register is set to "1". Otherwise the inputs are disabled.
*2: "Status before the mode retained" means that it keep previous output state when output or that the
input is "not possible" when input.
*3: "Input not possible" means that the gate connected to the input pin is functioning as input but the
internal circuit can not accept this input signal because the internal circuit is not functioning.
*4: "Input disabled" means that the gate connected to the input pin is disabled.
*5: "Output Hi-Z" means that the pin driving transistor is placed in the drive prohibited state to set the
pin to high impedance.
158
Standby mode
Stop mode/time-base timer mode
Sleep
SPL = 0
Input disabled
status before the
mode retained
Not affected
Input enabled
status before the
mode retained
SPL = 1
*4
/
Input disabled
output Hi-Z
*2
*1
/
*1
Input enabled
*5
output Hi-Z
*2
Reset
*4
/
*5
Input not possible
*5
output Hi-Z
/
*3
/
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