Fig. 5.4.6 Flowchart Of Data Output Processing Routine - Renesas 7200 Series User Manual

Mitsubishi 8-bit single-chip microcomputer
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(3) Data output processing routine
The data output processing routine is the common routine within the transmit/receive processing
routine.
Store the number of output bytes to internal RAM
S0 (address 00D7
S1 (address 00D9
Preparation for judging timeout.
= 1 (Not yet)
PIN (bit 4 at address 00D9
LRB (bit 0 at address 00D9
No

Fig. 5.4.6 Flowchart of data output processing routine

5.4 Example of I
Data output
)←Data to be output
16
The first byte ?
Yes
)←11110000
16
An error
such as timeout occurs ?
TRX (bit 6 at address 00D9
)≠"0" or
16
AL (bit 3 at address 00D9
)≠"1" ?
16
No error
= 0 (Completion of 1-byte data transmit)
Stop judging of timeout.
= 0 (ACK)
Store the next data to A
The last byte ?
Yes
END
7220 Group User's Manual
2
C-BUS interface control (M37221Mx-XXXSP/FP)
A:
S0:
S1:
TRX:
AL:
PIN:
LRB:
N
Output A.
2
An error occurs when data
transmit does not end within a
certain period.
TRX = 0 :
AL = 1 :
Error
1-byte data transmit completes?
) ≠ "1" ?
16
= 1 (No ACK)
) ≠ "1" ?
16
No ACK?
APPLICATION
Accumulator
2
I
C data shift register
2
I
C status register
Communication mode specification bit
Arbitration lost detecting flag
2
Multi-master I
C interface interrupt
enable bit
Last receive bit
arbitration lost is
detected (error)
END
5-25

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