General Flowchart; Fig. 5.3.6 General Flowchart When Using Rom Correction Function - Renesas 7200 Series User Manual

Mitsubishi 8-bit single-chip microcomputer
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5.3 Usage example of ROM correction function (M37221M8/MA-XXXSP)

5.3.4 General flowchart

Figure 5.3.6 shows the general flowchart when using ROM correction function. E
flowchart corresponds to E
• ROM correction address 1 (high-order)
address 0217
• ROM correction address 1 (low-order)
address 0218
address 02C0
← 003
ROM correction enable register
(b0 at address 021B
• ROM correction address 2 (high-order)
address 0219
• ROM correction address 1 (low-order)
address 021A
address 02E0
← 026
ROM correction enable register
(b1 at address 021B

Fig. 5.3.6 General flowchart when using ROM correction function

2
PROM map (refer to "Figures 5.3.4 and 5.3.5").
After reset release, read the data
from E
2
PROM
• ROM correction function 1 (address 000
Valid/invalid
• ROM correction function 2 (address 023
Valid/invalid
Yes
Use ROM correction function 1 ?
← 001
2
of E
PROM
16
16
← 002
of E
2
PROM
16
16
to 02DF
16
16
2
to 022
of E
PROM
16
16
)← "1" (enabled)
16
Yes
Use ROM correction function 2 ?
← 024
of E
2
PROM
16
16
← 025
2
of E
PROM
16
16
to 02FF
16
16
to 045
of E
2
PROM
16
16
)← "1" (enabled)
16
7220 Group User's Manual
START
)
16
)
16
No
ROM correction enable register
(b0 at address 021B
Store execution address
into ROM correction address 1.
Store correction codes of ROM
correction function 1 into ROM
correction memory 1 (block 1).
Enable block 1 enable bit.
No
ROM correction enable register
(b1 at address 021B
Store execution address
into ROM correction address 2.
Store correction codes of ROM
correction function 2 into ROM
correction memory 2 (block 2).
Enable block 2 enable bit.
END
APPLICATION
2
PROM addresses in the
←55
: valid, others: invalid
16
)← "0" (disabled)
16
Disable block 1 enable bit.
)← "0" (disabled)
16
Disable block 2 enable bit.
5-19

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