Table 1.3.1 Pin Description (1) - Renesas 7200 Series User Manual

1.3 Pin description
The pin description is shown in Table 1.3.1.
M37220M3-XXXSP/FP
Refer to "CHAPTER 4. M37220M3-XXXSP/FP."

Table 1.3.1 Pin description (1)

Pin Name
V , Power source
CC
V
SS
CNV
CNV
SS
SS
______
Reset input
RESET
Clock input
X
IN
Clock output
X
OUT
I/O port P0
P0
0
PWM0–
P0 /
5
PWM5,
PWM output
P 0 / I N T 2 /
6
A-D4
,
External
P0 /INT1
7
interrupt input
Analog input
I/O port P1
P1 /OUT2,
0
P1 /SCL1,
1
CRT output
P1 /SCL2,
2
P1 /SDA1,
3
P1 /SDA2, Multi-master
4
2
I C-BUS
P1 /A-D1/
5
interface
INT3,
Analog input
P1 /A-D2,
6
P1 /A-D3
7
External
interrupt input
Input/
Output
Apply voltage of 5 V ± 10 % (typical) to V
Connected to V
Input To enter the reset state, the reset input pin must be kept at a "L" for
2 µ s or more (under normal V
If more time is needed for the quartz-crystal oscillator to stabilize, this
"L" condition should be maintained for the required time.
Input
This chip has an internal clock generating circuit. To control generating
frequency, an external ceramic resonator or a quartz-crystal oscillator
is connected between pins X
Output the clock source should be connected to the X
should be left open.
I/O Port P0 is an 8-bit I/O port with direction register allowing each I/O bit
to be individually programmed as input or output. At reset, this port is
set to input mode. The output structure is N-channel open-drain output.
Pins P0 –P0
Output
0 5
respectively. The output structure is N-channel open-drain output.
Input Pins P0 , P0
6
INT1 respectively.
P0 pin is also used as analog input pin A-D4.
Input
6
Port P1 is an 8-bit I/O port and has basically the same functions as
I/O
port P0. The output structure is CMOS output.
Pins P1 is also used as CRT output pin OUT2. The output structure
Output
0
is CMOS output.
Pins P1 –P1
I/O
1 4
when multi-master I
N-channel open-drain output.
Pins P1 –P1
Input
5 7
respectively.
P1 pin is also used as external interrupt input pin INT3.
Input
5
7220 Group User's Manual
Functions
.
SS
conditions).
CC
and X
IN
are also used as PWM output pins PWM0–PWM5
are also used as external interrupt input pins INT2,
7
are used as SCL1, SCL2, SDA1 and SDA2 respectively,
2
C-BUS interface is used. The output structure is
are also used as analog input pins A-D1 to A-D3
OVERVIEW
1.3 Pin description
, and 0 V to V
CC
. If an external clock is used,
OUT
pin and the X
IN
.
SS
pin
OUT
1-7