Fig. 4.5.5 Interrupt Request Register; Fig. 4.5.6 Interrupt Control Register - Renesas 7200 Series User Manual

M37220M3-XXXSP/FP
4.5 Functional description
Interrupt Request Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 4.5.5 Interrupt request register 1 (address 00FC
Interrupt Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 4.5.6 Interrupt control register 1 (address 00FE
4-16
Interrupt request register 1 (IREQ1) [Address 00FC
B Name
0
Timer 1 interrupt
request bit (TM1R)
1 Timer 2 interrupt
request bit (TM2R)
2 Timer 3 interrupt
request bit (TM3R)
3 Timer 4 interrupt
request bit (TM4R)
4 CRT interrupt
request bit (CRTR)
5 V interrupt
SYNC
request bit (VSCR)
6 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is "0."
INT3 interrupt
7
request bit (IT3R)
: "0" can be set by software, but "1" cannot be set.
Interrupt control register 1 (ICON1) [Address 00FE
B Name
0 Timer 1 interrupt
enable bit (TM1E)
1 Timer 2 interrupt
enable bit (TM2E)
Timer 3 interrupt
2
enable bit (TM3E)
Timer 4 interrupt
3
enable bit (TM4E)
4 CRT interrupt enable
bit (CRTE)
V interrupt
5
SYNC
enable bit (VSCE)
Nothing is assigned. This bit is a write disable bit.
6
When this bit is read out, the value is "0."
INT3 interrupt
7
enable bit (IT3E)
7220 Group User's Manual
]
16
Functions
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
)
16
]
16
Functions
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
)
16
After reset R W
0 R
0 R
0 R
0
R
0 R
0 R
0 R —
0 R
After reset R W
0 R W
0 R W
0 R W
0 R W
0 R W
0 R W
0 R —
0 R W