Fig. 5.1.10 Flowchart Of Crt Interrupt Processing Routine (When Setting Multiple Interrupts) - Renesas 7200 Series User Manual

Mitsubishi 8-bit single-chip microcomputer
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(3) CRT interrupt processing routine when setting multiple interrupts
Figure 5.1.10 shows the flowchart of CRT interrupt processing routine when setting multiple interrupts.
A and B are the setting routines for multiple interrupts.
Set routine for
multiple
interrupts
Enable state of
multiple interrupts
(V
, Timer 1)
SYNC
Disable
multiple interrupts

Fig. 5.1.10 Flowchart of CRT interrupt processing routine (when setting multiple interrupts)

CRT interrupt processing routine
T
D
A
CRT_ICON1
CRT_ICON2
ICON1 (address 00FE
16
ICON2 (address 00FF
16
I
Push registers X, Y, A
CRT interrupt processing
Pop the registers X, Y, A
←"1"
I
B
←CRT_ICON1
ICON1
←CRT_ICON2
ICON2
RETURN
7220 Group User's Manual
5.1 Example of multi-line display
ICON1, ICON2:
CRT_ICON1, CRT_ICON2 :
←"0"
←"0"
←ICON1
←ICON2
←"00100001
)
"
2
←Enable V
←"00000000
)
"
2
←"0"
take priority than CRT interrupt.
And also, be sure to disable the following interrupts:
-CRT interrupt
-all interrupts with lower priority than CRT
←Disable all interrupts
←Pop ICON 1 and 2 contents
during CRT interrupt
APPLICATION
Interrupt control registers 1, 2
Back up RAM for interrupt control
registers 1, 2 during CRT interrupt
A :
Accumulator
X :
Index register X
Y :
Index register Y
T :
X modified operation mode flag
D :
Decimal operation mode flag
and Timer 1 interrupts to
SYNC
interrupt.
5-11

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