Renesas 7200 Series User Manual page 6

2. Register diagram
The figure of each register structure describes its functions, contents at reset, end attributes as follows:
CPU Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1 1
Notes 1: Values immediately after reset release
2: Bit attributes••••••The attributes of control register bits are classified into 3 types : read-only, write-only
ii
Bits
Values immediately after reset release
0 0
CPU mode register (CPUM) (CM) [Address FB
B Name
Fix these bits to "0."
0, 1
Stack page selection
2
bit (CM2)
3 Fix these bits to "1."
to
5
6, 7
: Bit in which nothing is assigned
0••••••"0" after reset release
1••••••"1" after reset release
?••••••Indeterminate after reset release
and read and write. In the figure, these attributes are represented as follows :
R••••••Read
R ••••••Read enabled
— ••••••Read disabled
Bit attributes
16
Functions
0: 0 page
1: 1 page
W••••••Write
W ••••••Write enabled
— ••••••Write disabled
••••••"0" can be set by software, but "1"
cannot be set.
(Note 2)
(Note 1)
]
After reset R W
0 R W
1 R W
1 R W
Indeterminate R W