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APPENDIX
6.7 Control registers
Timer 12 Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 6.7.24 Timer 12 mode register
6-46
0
Timer 12 mode register (T12M) [Address 00F4
B
0
Timer 1 count source
selection bit (T12M0)
1
Timer 2 count source
selection bit
(T12M1)
Timer 1 count
2
stop bit (T12M2)
Timer 2 count stop
3
bit (T12M3)
4
Timer 2 internal count
source selection bit
(T12M4)
5
Fix this bit to "0."
6,7
Nothing is assigned. These bits are write disable
bits. When these bits are read out, the values are
"0."
7220 Group User's Manual
Name
0: f(X
)/16
IN
1: f(X
)/4096
IN
0: Internal clock
1: External clock from
P2
/TIM2 pin
4
0: Count start
1: Count stop
0: Count start
1: Count stop
0: f(X
)/16
IN
1: Timer 1 overflow
]
16
Functions
After reset
0
0
0
0
0
0
0
Address 00F4
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
—
16
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