Fig. 5.3.3 Correction Example (2) - Renesas 7200 Series User Manual

Mitsubishi 8-bit single-chip microcomputer
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APPLICATION
5.3 Usage example of ROM correction function (M37221M8/MA-XXXSP)
(2) Correction example 2
The loop processing is performed between
shown in detail. Example A corrects in loop units and example B corrects only error instructions.
Examples A and B are the same operation, differing in processing time and correction bytes only.
Depending on the contents of loop processing, it may be preferable to include correct codes with the
codes to be corrected, simplifying the correction program and making it easier to read.
When omitting FE96H ( ) and correcting from FE98H, the program cannot move to FE96H by the
BPL instruction (the jump destination addresses of the BPL instruction are limited to bytes between
–128 and +127). Therefore, the example B is provided.
Program before correction
Address
Machine
instructions
FE96
9525
FE98
CA
FE99
10FB
FE9B
60
Notes 1: In
, FE9BH is specified as the return destination address of JMP.
In this example, since the instruction at the return destination address is
RTS is used instead of JMP , the operation is the same as that of JMP .
even if
As a result, the number of bytes is reduced.
2: BPL and BMI, as machine instructions, have no absolute addresses, but relative
addresses as branch destinations.

Fig. 5.3.3 Correction example (2)

5-16
Description style
025H, X
STA
DEX
BPL
0FE96H
(See note 2)
RTS
7220 Group User's Manual
and
in Figure 5.3.3. Two examples of this part are
Example A
Correction program
Address
Machine
(block 2)
instructions
02E0
9525
02E2
9D2501
02E5
3A
02E6
CA
02E7
10F7
02E9
60
Example B
Correction program
Address
Machine
(block 2)
instructions
02E0
9D2501
02E3
3A
02E4
CA
02E5
3003
02E7
4C96FE
4C9BFE
02EA
RTS,
Description style
025H, X
STA
STA
0125H, X
INC
A
DEX
BPL
02E0H
(See note 2)
RTS (See note 1)
Description style
STA
0125H, X
INC
A
DEX
BMI
02EAH
(See note 2)
JMP
FE96H
JMP
FE9BH
(See note 1)

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