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2.8 Multi-master I
2
The multi-master I
C-BUS interface is a serial communications circuit, conforming to the Philips I
data transfer format. This interface, offering both an arbitration lost detection and a synchronous functions,
is useful for the multi-master serial communications.
Figure 2.8.1 shows a block diagram of the multi-master I
2
master I
C-BUS interface functions.
The M37220M3-XXSP/FP does not have this function.
Table 2.8.1 Multi-master I
Item
Format
Communication mode
SCL clock frequency
f : System clock = f(X
Note: We are not responsible for any third party's infringement of patent rights or other rights attributable
to the use of the control function (bits 6 and 7 of the I
connections between the I
2
C-BUS interface
2
C-BUS interface functions
In conformity with Philips I
10-bit addressing format
7-bit addressing format
High-speed clock mode
Standard clock mode
In conformity with Philips I
Master transmission
Master reception
Slave transmission
Slave reception
16.1 kHz to 400 kHz (at f = 4 MHz)
)/2
IN
2
C-BUS interface and ports (SCL1, SCL2, SDA1, SDA2).
7220 Group User's Manual
FUNCTIONAL DESCRIPTION
2.8 Multi-master I
2
C-BUS interface and Table 2.8.1 shows multi-
Function
2
C-BUS standard:
2
C-BUS standard:
2
C control register at address 00DA
2
C-BUS interface
2
C-BUS
) for
16
2-47
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