Chapter 1. Overview; Table 1.1.1 Performance Overview (1) - Renesas 7200 Series User Manual

The performance overview is shown in Table 1.1.1.
M37220M3-XXXSP/FP
Refer to "CHAPTER 4. M37220M3-XXXSP/FP."

Table 1.1.1 Performance overview (1)

Parameter
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output ports
Serial I/O
Multi-master I 2 C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function (See note)
M37221M4-XXXSP
M37221M6-XXXSP/FP
M37221M8-XXXSP
M37221MA-XXXSP
CRT ROM
CRT RAM
I/O
P0 –P0
0 7
I/O
P1 , P1 –P1
0 5 7
I/O
P1 –P1
1 4
I/O
P2 , P2
0 1
I/O
P2 –P2
2 7
I/O
P3 , P3
0 1
I/O
P3
2
Input
P3 , P3
3 4
Output
P5 –P5
2 5
7220 Group User's Manual
Performance
71
0.5 µ s (the minimum instruction execution time, at 8
MHz oscillation frequency)
8 MHz (maximum)
ROM 16 K bytes
RAM 320 bytes
ROM 24 K bytes
RAM 384 bytes
ROM 32 K bytes
RAM 512 bytes
ROM 40 K bytes
RAM 640 bytes
8 K bytes
96 bytes
8-bit 1 (N-channel open-drain output structure, can be
used as PWM output pins, INT input pins, A-D input pin)
4-bit 1 (CMOS input/output structure, can be used as
CRT output pin, A-D input pins, INT input pin)
4-bit 1 (CMOS input/output structure, can be used as
multi-master I 2 C-BUS interface)
2-bit 1 (CMOS input/output or N-channel open-drain
output structure, can be used as serial I/O pins)
6-bit 1 (CMOS input/output structure, can be used as
serial input pin, external clock input pins)
2-bit 1 (CMOS input/output or N-channel open-drain
output structure, can be used as A-D input pins)
1-bit 1 (N-channel open-drain output structure)
2-bit 1 (can be used as CRT display clock I/O pins)
4-bit 1 (CMOS output structure, can be used as CRT
output pins)
8-bit 1
1 (2 systems)
6 channels (6-bit resolution)
14-bit 1, 8-bit 6
8-bit timer 4
32 bytes 2
OVERVIEW
1.1 Performance overview
1-3