Table of Contents
Advertisement
FUNCTIONAL DESCRIPTION
2.7 Serial I/O
2.7.7 Note when selecting a synchronous clock
Regardless of either an internal or external clock is selected as the serial I/O synchronous clock source,
the interrupt request bit is set to "1" after 8 transfer clocks.
However, the serial I/O register contents will continue to be shifted as long as the transfer clock is being
input to the serial I/O circuit, so it is necessary to stop after 8 transfer clocks.
When an internal clock is selected, the transfer clock stops automatically after 8 clocks.
When an external clock is selected, control the transfer clock externally. Moreover, use an external clock
of 1 MHz or less with a duty cycle of 50 %.
When selecting an external clock as the synchronizing clock, write transmit data to the serial I/O register
transfer clock input level is HIGH
Figure 2.7.6 shows the serial I/O timing.
Synchronous clock
Transfer clock
Serial I/O register
writing signal
Serial I/O output
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
S
OUT
Serial I/O input
S
IN
Interrupt request bit is set to "1"
Note: When an internal clock is selected, pin S
is at high-impedance after transfer is completed.
OUT
Fig. 2.7.6 Timing diagram of serial I/O
7220 Group User's Manual
2-45
Advertisement
Table of Contents
