Fig. 2.3.4 Memory Map Of Sfr (Special Function Register) (2) - Renesas 7200 Series User Manual

FUNCTIONAL DESCRIPTION
2.3 Memory assignment
SFR Area (addresses E0
Register
Address
E0
Horizontal position register (HR)
16
E1
Vertical position register 1 (CV1)
16
E2
Vertical position register 2 (CV2)
16
E3
16
E4 Character size register (CS)
16
E5 Border selection register (MD)
16
E6 Color register 0 (CO0)
16
E7
Color register 1 (CO1)
16
E8
Color register 2 (CO2)
16
E9 Color register 3 (CO3)
16
EA
CRT control register (CC)
16
EB
16
EC
CRT port control register (CRTP)
16
ED
CRT clock selection register (CK)
16
EE
A-D control register 1 (AD1)
16
EF
A-D control register 2 (AD2)
16
F0
Timer 1 (TM1)
16
F1
Timer 2 (TM2)
16
F2
Timer 3 (TM3)
16
F3
Timer 4 (TM4)
16
F4
Timer 12 mode register (T12M)
16
F5 Timer 34 mode register (T34M)
16
F6
PWM5 register (PWM5)
16
F7
16
F8
16
F9
Interrupt input polarity register (RE)
16
FA
16
FB CPU mode register (CPUM)
16
FC Interrupt request register 1 (IREQ1)
16
FD Interrupt request register 2 (IREQ2)
16
FE
Interrupt control register 1 (ICON1)
16
FF Interrupt control register 2 (ICON2)
16

Fig. 2.3.4 Memory map of SFR (special function register) (2)

2-14
to FF )
16 16
Bit allocation
< >
:
Function bit
:
Name
:
No function bit
: Fix this bit to "0"
0
(do not write "1")
: Fix this bit to "1"
1
(do not write "0")
Bit allocation
b7
HR5 HR4 HR3 HR2
CV16 CV15 CV14 CV13 CV12
CV26 CV25 CV24 CV23 CV22
CS21 CS20
MD20
CO07 CO06 CO05 CO04 CO03 CO02
CO17 CO16 CO15 CO14 CO13 CO12
CO27 CO26 CO25 CO24 CO23 CO22
CO37 CO36 CO35 CO34 CO33 CO32
CC7 CC2
OP7 OP6 OP5 OUT1 OUT2 R/G/B
0 0 0 0 0
ADM4 ADM2
ADC5 ADC4 ADC3 ADC2
0
T12M4 T12M3 T12M2
T34M5 T34M4 T34M3 T34M2
0
RE5 RE4 RE3 CK0
00
16
CM2
1 1 1 1 1
IT3R IICR VSCR CRTR TM4R TM3R
0
MSR CK0 S1R
IT3E IICE VSCE CRTE TM4E TM3E
0 0 0 MSE 0 S1E
7220 Group User's Manual
State immediately after reset
<
: "0" immediately after reset
0
: "1" immediately after reset
1
? : Indeterminate immediately
after reset
State immediately after reset
b0 b7
HR1 HR0
0
CV11 CV10
? ?
0
CV21 CV20 ? ?
0 0 0
CS11 CS10
0 0 0
MD10
CO01
CO11
CO21
CO31
CC1 CC0
VSYC HSYC
0
CK1 CK0
0 0 0
ADM1 ADM0
ADC1 ADC0
T12M1 T12M0
T34M1 T34M0
0 0 0 0 0
0 0 ? ? 1
TM2R TM1R
1T2R 1T1R
TM2E TM1E
1T2E 1T1E
>
b0
00
16
? ? ? ? ?
? ? ? ? ?
?
0
? ? ? ?
0 0 0
? ?
00
16
00
16
00
16
00
16
00
16
?
00
16
00
16
0 0 0 0
?
00
16
FF
16
07
16
FF
16
07
16
00
16
00
16
?
?
?
0 0 0 0 ?
00
16
1 1 1 0 0
00
16
00
16
00
16
00
16