Renesas 7200 Series User Manual page 57

FUNCTIONAL DESCRIPTION
2.5 Interrupts
Interrupt Request Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 2.5.3 Interrupt request register 1 (address 00FC
Interrupt Request Register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
Fig. 2.5.4 Interrupt request register 2 (address 00FD
2-30
Interrupt request register 1 (IREQ1) [Address 00FC
B Name
0
Timer 1 interrupt
request bit (TM1R)
1 Timer 2 interrupt
request bit (TM2R)
2 Timer 3 interrupt
request bit (TM3R)
3 Timer 4 interrupt
request bit (TM4R)
4 CRT interrupt
request bit (CRTR)
5 V interrupt
SYNC
request bit (VSCR)
2
Multi-master I C-BUS interface
6
(IICR)
interrupt request bit
INT3 interrupt
7
request bit (IT3R)
: "0" can be set by software, but "1" cannot be set.
16
Interrupt request register 2 (IREQ2) [Address 00FD
B Name
0 INT1 interrupt
request bit (ITIR)
1 INT2 interrupt
request bit (IT2R)
2 Serial I/O interrupt
request bit (S1R)
3 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is "0."
4 f(X )/4096 interrupt
IN
request bit (MSR)
5, 6 Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are "0."
7 Fix this bit to "0."
: "0" can be set by software, but "1" cannot be set.
16
7220 Group User's Manual
16
Functions
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
)
Functions
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
)
]
After reset R W
0 R
0 R
0 R
0 R
0 R
0 R
0 R
0 R
]
16
After reset R W
0 R
0 R
0
R
0 R —
0 R
0 R —
0 R W