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Timer 34 Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 2.6.4 Timer 34 mode register (address 00F5
Table 2.6.1 Memory map of timer-related registers
Addresses
00F0
16
00F1
16
00F2
16
00F3
16
00F4
Timer 12 mode register (T12M)
16
00F5
Timer 34 mode register (T34M)
16
Timer 34 mode register (T34M) [Address 00F5
B
Name
0
Timer 3 count source
selection bit (T34M0)
1
Timer 4 internal count
source selection bit
(T34M1)
Timer 3 count
2
stop bit (T34M2)
Timer 4 count stop
3
bit (T34M3)
4 Timer 4 count source
selection bit (T34M4)
5 Timer 3 external count
source selection bit (T34M5)
Nothing is assigned. These bits are write disable
6,7
bits. When these bits are read out, the values are
"0."
Contents
Timer 1 (TM1)
Timer 2 (TM2)
Timer 3 (TM3)
Timer 4 (TM4)
7220 Group User's Manual
FUNCTIONAL DESCRIPTION
Functions
0: f(X
)/16
IN
1: External clock
0: Timer 3 overflow
1: f(X
)/16
IN
0: Count start
1: Count stop
0: Count start
1: Count stop
0: Internal clock
1: f(X
)/2
IN
0: External clock from P2
1: External clock from H
)
16
]
16
After reset R W
0
R W
0
R W
0
R W
0
R W
0
R W
/TIM3 pin
0
R W
3
pin
SYNC
0
R —
2.6 Timers
2-37
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