Halt Mode; Setting And Operation Status; Releasing Halt Mode - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
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15.2 HALT Mode

15.2.1 Setting and operation status

The HALT mode is set when a dedicated instruction (HALT) is executed in the normal operation mode.
In the HALT mode, the clock oscillator continues operating. Only clock supply to the CPU is stopped; clock supply
to the other on-chip peripheral functions continues.
As a result, program execution is stopped, and the internal RAM retains the contents before the HALT mode was
set. The on-chip peripheral functions that are independent of instruction processing by the CPU continue operating.
Table 15-3 shows the operation status in the HALT mode.
The average power consumption of the system can be reduced by using the HALT mode in combination with the
normal operation mode for intermittent operation.
Caution Insert five or more NOP instructions after the HALT instruction.

15.2.2 Releasing HALT mode

The HALT mode is released by a non-maskable interrupt request, an unmasked maskable interrupt request, and
RESET pin input.
After the HALT mode has been released, the normal operation mode is restored.
(1) Releasing HALT mode by non-maskable interrupt request or unmasked maskable interrupt request
The HALT mode is released by a non-maskable interrupt request or an unmasked maskable interrupt request,
regardless of the priority of the interrupt request. If the HALT mode is set in an interrupt servicing routine,
however, an interrupt request that is issued later is serviced as follows.
(a) If an interrupt request with a priority lower than that of the interrupt request currently being serviced is
issued, only the HALT mode is released, and that interrupt request is not acknowledged. The interrupt
request itself is retained.
(b) If an interrupt request with a priority higher than that of the interrupt request currently being serviced is
issued (including a non-maskable interrupt request), the HALT mode is released and that interrupt request
is acknowledged.
Table 15-2. Operation After Releasing HALT Mode by Interrupt Request
Release Source
Non-maskable interrupt request
Maskable interrupt request
CHAPTER 15 STANDBY FUNCTION
Interrupt Enabled (EI) Status
Execution branches to the handler address
Execution branches to the handler
address or the next instruction is
executed
Preliminary User's Manual U15905EJ1V0UD
Interrupt Disabled (DI) Status
The next instruction is executed
451

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