DDC Total-AceXtreme MIL-STD-1553 Design Manual page 29

Ultra-small, ultra-low power single package solution
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For its BC and RT modes, the Total-AceXtreme® includes an Advanced Data
Handler (ADH) feature. The ADH reduces host overhead for the transferring of
message control and status information, and data word structures between the Total-
AceXtreme's internal shared memory and CPU or PCI host address space.
For each message processed by the Total-AceXtreme's BC, there are separate
data structures for the BC instruction list; message control and status information;
and transmitted or received data words. Similarly, for each message processed by
the Total-AceXtreme's RT (or one of its multiple RTs), there are separate data
structures for message status information; and for transmitted or received data.
In a typical BC application, the Control/Status blocks and data blocks can be
scattered in different areas of Total-AceXtreme® memory. Similarly, in RT mode,
the message status information is stored in entries in the RT's descriptor stack, while
data is stored in individual data blocks, in RT/Subaddress-specific circular buffers, or
in the global circular buffer.
The ADH provides an optional mechanism for moving data from the Total-
AceXtreme's native data structures, and a separate area of Total-AceXtreme
memory dedicated to the ADH. The ADH offers an number of options, including:
• Transferring data words only, or both message control/status and data
words.
• In the case where both message control/status information and data words
are transferred, they will be combined into single, consolidated data
structures for each message. This reduces the burden on the host
processor from having to parse through multiple data structures for each
message processed.
• A filter option such that only valid messages are transferred to ADH
memory, or for all messages, regardless of validity, to be transferred to
ADH memory.
• Transferring either received messages only, transmitted messages only, or
both.
• For RT mode, messages that are transferred into the ADH area of memory
can be filtered on a T/R-bit/Subaddress basis. For the case of Multi-RT,
messages can be filtered on an RT Address/T/R-bit/Subaddress basis.
The ADH offers a number of interrupt options. These include following the transfer of
a specified number of message, the transfer of a specified number of words,
timeouts, or a software-initiated interrupt. The ADH also provides the host with
indications when its command FIFO (list of messages to transfer) is full or empty.
Data Device Corporation
www.ddc-web.com
M I L - S T D - 1 5 5 3 M O D E S A N D A R C H I T E C T U R E
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