Figure 3. Bus Controller Block Diagram - Remote Terminal Operation - DDC Total-AceXtreme MIL-STD-1553 Design Manual

BC Block
EXT_TRIG
GPQ Controller
Instruction
List
(ICL)
Shared RAM (Applicable Logical Areas Highlighted)

Figure 3. Bus Controller Block Diagram - Remote Terminal Operation

The Total-AceXtreme® RT architecture builds upon the single-RT architecture of
Enhanced Mini-ACE, Mini-ACE Mark 3, Micro-ACE(TE), and Total-ACE.
One of the major new features of Total-AceXtreme is its Multi-RT capability. That is,
the Total-AceXtreme provides the capability to implement up to 31 independent
Remote Terminals (up to 32 RTs if Broadcast is disabled).
The Total-AceXtreme -RT engine can also be configured to operate in a Single-RT
legacy mode of operation. Single-RT operation supports hardware control of the RT
address and automatic boot, allowing the Total-AceXtreme to respond to commands
with Status with its Busy bit set immediately following power turn-on without requiring
configuration by the host.
For RT (and/or Monitor) applications, where the possibility of BC operation must be
absolutely prohibited, the Total-AceXtreme includes a DISABLE_BC input signal. In
addition to single-RT and Multi-RT operation, the Total-AceXtreme® includes the
following capabilities:
Data Device Corporation
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M I L - S T D - 1 5 5 3 M O D E S A N D A R C H I T E C T U R E
BC Registers
HP Queue
Controller
General
Purpose Flags
(GPF)
Command Interpreter
General
Purpose HP Queue
Queue (HPQ)
(GPQ)
LP Queue
Controller
Delay Timer (16 bits)
1us
Message Timer (16 bits)
1us
Message
LP Queue
Blocks
(LPQ)
(MB)
16
1553_IN_A
1553_IN_B
1553 BC
Protocol
Engine
1553_OUT_A
1553_OUT_B
Data
Blocks
(DB)
DS-BU-67301B-G
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