Dma Controller; Figure 6. Pci Dma Block Diagram - Digital I/O - DDC Total-AceXtreme MIL-STD-1553 Design Manual

4.4

DMA Controller

The Total-AceXtreme® includes a programmable DMA controller. The DMA
controller, which operates in conjunction with the Total-AceXtreme's PCI Initiator
interface, can be used to transfer data from the Total-AceXtreme's internal Shared
RAM to PCI Host Memory space (Upstream) or from PCI Host Memory to Shared
RAM (Downstream).
This DMA controller can be configured to transfer the data using two different modes.
In both the Block Mode and the Scatter/Gather Mode, DMA transfers are always
host-initiated. They are never initiated autonomously by the Total-AceXtreme. These
two modes are described below:
• Block Mode: Each transfer is initiated by the System Host and is a
contiguous block of memory transferred Upstream or Downstream.
• Scatter/Gather Mode: The DMA Controller performs a series of
independent transfers, which can include a mix of Upstream and
Downstream transfers, using a descriptor table created by the host with no
further host intervention. Clear Count Mode is an option within
Scatter/Gather Mode. When enabled, the Transfer Size field of each
descriptor will be cleared after the corresponding transfer has been
completed so that the host can check how much of the transfer has been
completed while in progress or following an abort or retry timeout.
CPU
System Memory
Controller
Host Memory
Data Device Corporation
www.ddc-web.com
PCI Bus
Upstream

Figure 6. PCI DMA Block Diagram - Digital I/O

G L O B A L F E A T U R E S
Total-AceXtreme
PCI/DMA
Local Bus
Controller
Downstream
23
Shared RAM
DS-BU-67301B-G
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