Table 8. Synchronous 16-Bit Mode Configuration Options - DDC Total-AceXtreme MIL-STD-1553 Design Manual

Table 8. Synchronous 16-bit Mode Configuration Options

POL_SEL
1
1
0
0
6.4.4.1 Synchronous Mode Connection Diagrams
Figure 19 through Figure 22 show the four possible Synchronous mode interface
configurations, including the four combinations of 32-bit, 16-bit, non-multiplexed, and
multiplexed.
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RD_nWR FIRST WORD TRANSFER
MSW_nLSW = 1
1
CPU  RAM 15:0
MSW_nLSW = 1
0
CPU  RAM 15:0
MSW_nLSW = 0
1
CPU  RAM 15:0
MSW_nLSW = 0
0
CPU  RAM 15:0
H O S T I N T E R F A C E
SECOND WORD
TRANSFER
MSW_nLSW = 0
CPU  RAM 31:16
MSW_nLSW = 0
CPU  RAM 31:16
MSW_nLSW = 1
CPU  RAM 31:16
MSW_nLSW = 1
CPU  RAM 31:16
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