Mitsubishi Electric Q12DCCPU-V User Manual page 321

Melsec-q series c controller module
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10
PROGRAMMING USING MELSEC DATA LINK
FUNCTIONS
Device
Retentive timer (contact)
Retentive timer (coil)
Q/QnA link special register
(within Q/QnACPU)
Q/QnA edge relay (within Q/
QnACPU)
Own station random access
buffer
Retentive timer (current value)
Own station link register
(for sending)
Own station link register
(for receiving)
Own station buffer memory
Direct link input (other station
side)
Direct link output (other station
side)
Direct link relay (other station
side)
Direct link register (other station
*2
side)
Direct link special relay (other
station side)
Direct link special register
(other station side)
Special direct buffer register,
Intellligent function module
buffer memory
Table 10.16 Accessible devices for accessing other CPU (continued)
Device type
(Device name
specification)
Batch
DevSTT
Random
Batch
DevSTC
Random
Batch
DevQSW
Random
Batch
DevQV
Random
Batch
DevMRB
Random
Batch
DevSTN
Random
Batch
DevWw
Random
Batch
DevWr
Random
Batch
DevSPB
Random
Batch
DevLX(1) to DevLX(255)
Random
Batch
DevLY(1) to DevLY(255)
Random
Batch
DevLB(1) to DevLB(255)
Random
Batch
DevLW(1) to DevLW(255)
Random
Batch
DevLSB(1) to DevLSB(255)
Random
Batch
DevLSW(1) to DevLSW(255)
Random
Batch
DevSPG(0) to DevSPG(255)
Random
* 1 The following C Controller module is not accessible.
• Q12DCCPU-V with serial number (first five digits) "12041" or earlier
• Q06CCPU-V
* 2 When accessing to the device of number 32768 (8000
(
Page 10-4, Section 10.2)
10.13 Accessible Ranges and Devices of the MELSEC Data Link Function
Access target
Programmable controller
CPU
: Accessible
) or higher, use an extended function.
H
10.13.1 Access via a bus
9
C Controller module
10
11
12
*1
*1
*1
13
*1
*1
*1
A
*1
: Inaccessible
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10
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