I2C* Interface Design Guidelines; I2C* General Introduction; Description; Reference Specifications - Intel Quark SoC X1000 Design Manual

I2C* Interface Design Guidelines—Intel
2
6.0 I C* Interface Design Guidelines
2
6.1 I C* General Introduction
6.1.1

Description

There is a single I
2
wire I C serial interface consisting of a serial data line and a serial clock, only 3.3v
operation is supported. The I
the platform.
2
Each I C interface supports standard mode (up to 100 Kb/s) and fast mode (up to 400
Kb/s).Fast mode plus (up to 1 Mb/s) and High speed mode (up to 3.4 Mb/s) are not
supported.
6.1.2

Reference Specifications

2
I C Specification Version 2.1
2
6.2 I C* Signal Descriptions
6.2.1

Signal Groups

2
Table 24. I C Signals
Clock
Data
June 2014
Order Number: 330258-002US
®
Quark™ SoC X1000
2
C* controller in Intel
2
C interfaces are intended to support various sensors on
Group
I2C_CLK
I2C_DATA
®
Quark™ SoC X1000. The interface is a two-
Title
Signal Name
2
I C Clock signal
2
I C Data signal
Description
®
Intel Quark™ SoC X1000
PDG
55