Platform Reference Clock Signal Descriptions - Intel Quark SoC X1000 Design Manual

A 25 MHz crystal will be connected to the SoC as an input. This crystal input is used to
generate the following platform clock outputs:
• 1x 50 MHz differential sources for RMII_REFCLK_50M
• Two 33 MHz single ended clocks.
• 48 MHz single ended clock.
• Two 100 MHz differential clocks which default to spread spectrum mode.
Note: 25 MHz Crystal Requirement: All SoC-based platforms must use a 25 MHz crystal on
the platform to generate a differential clock on XTAL_IN/OUT to enable SoC to generate
platform clocks. It is critical that this XTAL clock is of good quality and has minimal
interference to ensure correct locking of the internal PLL. Intel is not validating use of
an external clock buffer oscillator connection to XTAL pins.
Note: Unused SoC Clock Outputs: All unused clocks on SoC can be left as No Connect.
10.2

Platform Reference Clock Signal Descriptions

Table 40. Signal Groups
Clock Type
Input from 25 MHz
crystal (Required)
Output Clocks from SoC
®
Intel Quark™ SoC X1000
PDG
74
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Intel Quark™ SoC X1000—Platform Clocks Design Guidelines
Clock Signals
XTAL_IN/XTAL_OUT 25 MHz source clock for Full Clock Integrated mode
CLKSYS25_OUT Single-ended 25 MHz output to devices.
REF0_OUTCLK_P
REF0_OUTCLK_N REF0_CLK: 100MHx 1v differential
REF1_OUTCLK_P REF1_CLK: 100MHz 1v differential
REF1_OUTCLK_N
SPI_CLK SPI Clocks from SoC
FLEX0_CLK FLEX0_CLK 33.33MHz 3.3v
FLEX1_CLK FLEX1_CLK 33.33MHz 3.3v spread spectrum
FLEX2_CLK FLEX2_CLK 48MHz 3.3v
RMII_REF_CLK_OUT Reference clock for RMII interface
Description
June 2014
Order Number: 330258-002US