Usb Esd Diode Recommendation; Series Rc Filters; Ground Shape Along The I/O Edge Of The Board - Intel Quark SoC X1000 Design Manual

To dampen the ESD energy it will be necessary to create the ground fill large enough to
create a strong mutual coupling that has low enough impedance where the energy can
be directed to ground. The results would be a drastic reduction in trace coupled noise.
Ground-Fill Procedural Recommendations:
This section describes the step-by-step process used to design an effective ESD ground
shape for ESD protection using an example design.
1. Locate the ground shape at the input/output (I.O.) edge of the board on all layers
except the ground layer, which should be a solid layer with no spits. Ground shape
is highlighted in yellow.
Figure 76.

Ground Shape Along the I/O Edge of the Board

2. The ground shape should be continuous along the edge, outside of any traces. Keep
the gap between the ground shape and other shapes or traces at least 20 mils. The
minimum shape neck width is 50 mils.
3. Ideally, the ground shape on each layer should connect to at least two mounting
holes for noise current to return to the chassis. If the ground shape cannot connect
to the mounting holes on every layer, then connections to the mounting holes on at
least one layer besides the ground layer should be sufficient, assuming the vertical
stitching is ample.
4. The ground shape is useless without proper vertical stitching to the ground layer.
Connector holes can be considered stitching vias. Add vias throughout the length of
the ground shape, no more than 300 mils apart, close to the board's edge.
18.2.3

USB ESD Diode Recommendation

Intel recommends placing ESD protection devices for each USB 2.0 data pair. Selection
of USB 2.0 ESD diode should be particularly careful and should be different due to
different speeds. Please refer to
recommendation.
18.2.4

Series RC Filters

Conventionally ESD protection circuits are composed with ESD diodes or varistors.
These non-linear components are activated typically at high voltage (>10 V) to guide
injected ESD current from sensitive parts such as ICs. They are very effective when the
ESD noise is injected directly into sensitive parts and signal lines. However, when the
ESD noise is injected into system ground and/or chassis, the capacitively/inductively
®
Intel Quark™ SoC X1000
PDG
130
®
Intel Quark™ SoC X1000—Electrostatic Discharge (ESD)
Section 18.3.1 for USB 2.0 for specific ESD diode
June 2014
Order Number: 330258-002US