Additional Guidelines; Terminating Unused Uart Signals; Uart Topology; Uart Routing Guideline - Intel Quark SoC X1000 Design Manual

Figure 32.

UART Topology

SOC UART
Data &
Control
Signals
Table 32.

UART Routing Guideline

Parameter
M - Trace Length
M - Trace Width
M - Trace Spacing
BO - Breakout Width
BO - Breakout Spacing
BO - Max Breakout Length
Impedance
8.4

Additional Guidelines

The UART interfaces support 3.3V only. Therefore, if devices connected to the UART
interfaces utilize 1.8V, external voltage translation must be implemented on the
motherboard to support this configuration.
8.5

Terminating Unused UART Signals

If the UART functionality is not utilized, the signals should be terminated properly with
external pull-up or pull-down resistors. The SOC implements internal pullup and pull
down on the UART IO, see
Table 33.

UART Internal Pull Up/Down

SIU0_RXD
SIU1_RXD
SIU0_TXD
SIU1_TXD
SIU0_RTS
SIU1_RTS
SIU0_CTS
SIU1_CTS
SIU0_DCD_B
®
Intel Quark™ SoC X1000
PDG
64
SOC
BO
(MS/SL/DSL)
Table
Pin
Input
Output
Output
Input
Input
®
Intel Quark™ SoC X1000—UART Interface Design Guidelines
M
Stackup
Units
MS inch
MS mils
MS mils
MS mils
MS mils
MS mils
MS ohm
33.
Direction
UART Device
Device
Data &
Control
Signals
Routing
Recommendation
1 - 7
4
5
3
3.5
500
50 ±15%
Pull Up/Down
Internal 20K Pull Up
No Internal Pull up or Pull Down
No Internal Pull up or Pull Down
Internal 20K Pull Up
Internal 20K Pull Up
June 2014
Order Number: 330258-002US