GE MiCOM P40 Technical Manual page 940

Appendix B -Settings and Signals
ORDINAL
1473 CB2 CS2 VL<VB
Voltage magnitude difference between Line V and Bus2 V is greater than setting [48 A4] (line V < Bus V)
1474 CB2 CS1 FL>FB
Frequency difference between Line V and Bus2 V is greater than setting [48 A1] (line freq > Bus freq)
1475 CB2 CS2 FL>FB
Frequency difference between Line V and Bus2 V is greater than setting [48 A6] (line freq > Bus freq)
1476 CB2 CS1 FL<FB
Frequency difference between Line V and Bus2 V is greater than setting [48 A1] (line freq < Bus freq)
1477 CB2 CS2 FL<FB
Frequency difference between Line V and Bus2 V is greater than setting [48 A6] (line freq < Bus freq)
1478 CB2 CS1 AngHigh+
Line/Bus2 phase angle in range: setting [48 9E] to +180deg (anticlockwise from Vbus)
1479 CB2 CS1 AngHigh-
Line/Bus2 phase angle in range: setting [48 9E] to -180deg (clockwise from Vbus)
1480 CB2 CS2 AngHigh+
Line/Bus2 phase angle in range: setting [48 A3] to +180deg (anticlockwise from Vbus)
1481 CB2 CS2 AngHigh-
Line/Bus2 phase angle in range: setting [48 A3] to -180deg (clockwise from Vbus)
1482 CB2 CS AngRotACW
Line freq > (Bus2 freq + 0.001Hz) (Line voltage vector rotating anticlockwise relative to VBus2)
1483 CB2 CS AngRotCW
Bus2 freq > (Line freq + 0.001Hz) (Line voltage vector rotating clockwise relative to VBus2)
1484 SChksInactiveCB2
Output from CB2 system check logic: indicates system checks for CB2 are disabled (setting "System Checks CB2" = Disabled or global
setting "System Checks" = Disabled)
1485 AR Force CB2 3P
This DDB is set when the autoreclose logic has determined that single pole tripping/autoreclosing is not permitted for CB2. It can be
applied in PSL when required to force trip conversion logic for internal and/or external protection to three phase trip mode for CB2.
1488 En CB1 Follower
Indicates conditions are satisfied to enable CB1 follower sequence
1491 CB1F SCOK
System conditions OK to reclose CB1 when follower time complete
1493 CB1 CS2 FL>FB
Frequency difference between Line V and Bus1 V is greater than setting [48 98] (line freq > Bus freq)
1494 CB1 CS2 FL<FB
Frequency difference between Line V and Bus1 V is greater than setting [48 98] (line freq < Bus freq)
1495 CB1 CS2 AngHigh+
Line/Bus1 phase angle in range: setting [48 95] to +180deg (anticlockwise from Vbus)
1496 CB1 CS2 AngHigh-
Line/Bus1 phase angle in range: setting [48 95] to -180deg (clockwise from Vbus)
1497 AR Mode 1P
If setting "Lead AR Mode" = Opto, then if input DDB "AR Mode 1P" is high, the leader CB is enabled for single phase autoreclose, if "AR
Mode 1P" is low, the leader CB is NOT enabled for single phase autoreclose.
1498 AR Mode 3P
If setting "Lead AR Mode" = Opto, then if input DDB "AR Mode 3P" is high, the leader CB is enabled for three phase autoreclose, if "AR
Mode 3P" is low, the leader CB is NOT enabled for three phase autoreclose.
1499 CB2 Trip AR MemA
CB2 A Ph trip & AR initiation memory
1500 CB2 Trip AR MemB
CB2 B Ph trip & AR initiation memory
1501 CB2 Trip AR MemC
CB2 C Ph trip & AR initiation memory
1504 Init APh AR Test
DDB mapped in PSL from opto or comms input. Input high-low operation will initiate APh test trip & autoreclose cycle
1505 Init BPh AR Test
DDB mapped in PSL from opto or comms input. Input high-low operation will initiate BPh test trip & autoreclose cycle
1506 Init CPh AR Test
DDB mapped in PSL from opto or comms input. Input high-low operation will initiate CPh test trip & autoreclose cycle
B194
SIGNAL NAME
DDB_SYSCHECKS2_2_VBUS_DIFF_HIGH
DDB_CS2_1_LINE_FREQ_GT_BUS_FREQ
DDB_CS2_2_LINE_FREQ_GT_BUS_FREQ
DDB_CS2_1_LINE_FREQ_LT_BUS_FREQ
DDB_CS2_2_LINE_FREQ_LT_BUS_FREQ
DDB_CS2_1_ANGLE_NOT_OK_POS
DDB_CS2_1_ANGLE_NOT_OK_NEG
DDB_CS2_2_ANGLE_NOT_OK_POS
DDB_CS2_2_ANGLE_NOT_OK_NEG
DDB_SYSCHECKS2_ANGLE_ACW
DDB_SYSCHECKS2_ANGLE_CW
DDB_SYSCHECKS_INACTIVE2
DDB_AR_FORCE_3_POLE_TRIPS_CB2
DDB_ENABLE_CB_FOLLOWER
DDB_CB_FOLLOWR_SYSTEM_CHECK_OK
DDB_CS2_LINE_FREQ_GT_BUS_FREQ
DDB_CS2_LINE_FREQ_LT_BUS_FREQ
DDB_CS2_ANGLE_NOT_OK_POS
DDB_CS2_ANGLE_NOT_OK_NEG
DDB_LEAD_AR_SP
DDB_LEAD_AR_3P
DDB_CB2_TRIP_AR_MEMORY_A
DDB_CB2_TRIP_AR_MEMORY_B
DDB_CB2_TRIP_AR_MEMORY_C
DDB_INIT_APH_AR_TEST
DDB_INIT_BPH_AR_TEST
DDB_INIT_CPH_AR_TEST
ELEMENT NAME
DESCRIPTION
P446SV
P446SV-TM-EN-1