Cb Trip Time Monitoring Logic Diagram; Figure 183: Circuit Breaker Trip Time Monitoring Logic Diagram (Modules 53 & 54) - GE MiCOM P40 Technical Manual

Chapter 11 - Autoreclose
5.18.1

CB TRIP TIME MONITORING LOGIC DIAGRAM

Trip Pulse Time
TAR2/3Ph
CB1 Open 3 Ph
CB1 Closed 3 Ph
Trip Pulse Time
TARA
TMEM2 /3Ph
CB1 Open 3 Ph
CB1 Closed 3 Ph
TARB
TMEM2 /3Ph
CB1 Open 3 Ph
CB1 Closed 3 Ph
TARC
TMEM2 /3Ph
CB1 Open 3 Ph
CB1 Closed 3 Ph
Trip Pulse Time
TAR2/3Ph
CB2 Open 3 Ph
CB2 Closed 3 Ph
Trip Pulse Time
TARA
TMEM2 /3Ph
CB2 Open 3 Ph
CB2 Closed 3 Ph
TARB
TMEM2 /3Ph
CB2 Open 3 Ph
CB2 Closed 3 Ph
TARC
TMEM2 /3Ph
CB2 Open 3 Ph
CB2 Closed 3 Ph
Figure 183: Circuit Breaker Trip Time Monitoring logic diagram (Modules 53 & 54)
324
S
Q
RD
&
903
907
&
S
Q
RD
&
903
907
&
S
Q
RD
&
903
907
&
S
Q
RD
&
903
907
S
Q
RD
&
911
915
&
S
Q
RD
&
911
915
&
S
Q
RD
&
911
915
&
S
Q
RD
&
911
915
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
S
Q
RD
1
t
1575
1 CB1 Fail Pr Trip
0
t
0
t
1459
0 1 CB2 Fail Pr Trip
t
0
P446SV
V03377
P446SV-TM-EN-1