Vmebus Interrupt Requests; Device Icrs; Vic Local Interrupt Vector Base Register - DEC Digital Alpha VME 4/224 User Manual

Each of the these interrupt sources has an associated ICR that allows the
interrupt to be programmed with an individual IPL or to be disabled. Figure 11–7
shows these ICRs.
Figure 11–7 Device ICRs
31
Disable
Encoded Priority 1-7
The vectors associated with these seven interrupt inputs have a single common
root that is modified to give a unique vector for each device. Bits <7:3> of this
common 8-bit vector are programmable while bits <2:0> uniquely identify the
winning interrupt.
Figure 11–8 shows the local interrupt vector base register.
Figure 11–8 VIC Local Interrupt Vector Base Register
31
VME_IF_BASE + 54 :
VIC_LIVBR
User Programmable Vector-Base
000 Not Used
001 Not Used
010 DC7407 Status
011 Not Used
100 Not Used
101 Not Used
110 Not Used
111 DC7407 Error

11.1.3.2 VMEbus Interrupt Requests

The VIC64 chip handles the standard seven-level prioritized interrupt scheme of
the VMEbus when configured as system controller.
As for the module-based interrupt sources described above, each of the seven
VMEbus interrupt request (IRQ) lines has its own ICR to allow individual disable
and priority assignments (see Figure 11–9 and Table 11–3).
08 07 06
Don't Care
08 07 06 05 04 03 02 01 00
Don't Care
System Interrupts 11–7
03 02 01 00
ML013305
ML013306