System Controller Operation - DEC Digital Alpha VME 4/224 User Manual

Table 10–6 (Cont.) Interprocessor Communication Register Map Through VIF_
ABR
<byte 1>+ Register
Interprocessor communication module switches (ICMS)
Write-only. A write to an odd address sets the switch; a Write to an even
address clears that switch.
020 Clear module switch 0
021 Set module switch 0
022 Clear module switch 1
023 Set module switch 1
024 Clear module switch 2
025 Set module switch 2
026 Clear module switch 3
027 Set module switch 3

10.3 System Controller Operation

A Digital Alpha VME 4 system can operate as a full VMEbus system controller
(in slot 1). The Digital Alpha VME 4 system is selected as a system controller
at power-up by the state of the module diagnostic-in-progress switch (position 4
closed).
As a system controller, the Digital Alpha VME 4 system provides the following
functions:
• Causes a global reset to the VME interface logic.
• Controls VMEbus arbitration (driving BGIOUT*)
Priority (PRI)
Round-Robin (RRS)
Single-level (SGL)
• Drives the system clock (SYSCLK)
• Controls timeout timers for data transfers and arbitration
• Handles VMEbus interrupt control (driving IACK*)
The system controller functions are controlled through byte registers that are
mapped into the lowest byte of an aligned longword in PCI memory space.
VME Interface 10–17