DEC Digital Alpha VME 4/224 User Manual page 142

Table 6–1 (Cont.) CSR Register Addresses for DECchip 21071-CA
Address Register Name
16
1 8000 0A40 Bank 2 configuration register
1 8000 0A60 Bank 3 configuration register
1 8000 0A80 Bank 4 configuration register
1 8000 0AA0 Bank 5 configuration register
1 8000 0AC0 Bank 6 configuration register
1 8000 0AE0 Bank 7 configuration register
1 8000 0B00 Bank 8 configuration register
1 8000 0C00 Bank 0 timing register A
1 8000 0C20 Bank 1 timing register A
1 8000 0C40 Bank 2 timing register A
1 8000 0C60 Bank 3 timing register A
1 8000 0C80 Bank 4 timing register A
1 8000 0CA0 Bank 5 timing register A
1 8000 0CC0 Bank 6 timing register A
1 8000 0CE0 Bank 7 timing register A
1 8000 0D00 Bank 8 timing register A
1 8000 0E00 Bank 0 timing register B
1 8000 0E20 Bank 1 timing register B
1 8000 0E40 Bank 2 timing register B
1 8000 0E60 Bank 3 timing register B
1 8000 0E80 Bank 4 timing register B
1 8000 0EA0 Bank 5 timing register B
1 8000 0EC0 Bank 6 timing register B
1 8000 0EE0 Bank 7 timing register B
1 8000 0F00 Bank 8 timing register B
6–10 Cache and Memory Subsystem