Vmebus Interrupt Vector Base Registers; Vmebus Interrupter Interrupt Control Register - DEC Digital Alpha VME 4/224 User Manual

Figure 10–15 VMEbus Interrupt Vector Base Registers
31
Status/ID Vector
A local interrupt can be generated to the CPU by the VME interface when it
detects a VMEbus IACK cycle for a VME interrupt that is pending. This interrupt
can be used to inform system software that the VMEbus interrupt request has
been serviced. The VIC interrupter interrupt control register (VME_IF_BASE +
0x00) provides enabling of priority encoding for this interrupt (Figure 10–16).
Figure 10–16 VMEbus Interrupter Interrupt Control Register
31
VME_IF_BASE+00 :
VIC_IICR
Mask
Encoded Priority 1-7
Table 10–11 VMEbus Interrupter Interrupt Control Register
Field Name
<2:0> Priority
<6:3> 1111
<7> Mask
The vector that is returned when the processor locally IACKs this interrupt comes
from the VIC error group interrupt vector register (VIC_EGIVBR) described in
Chapter 11.
Don't Care
Don't Care
Description
Priority 1-7
When set, no interrupt is generated.
08 00
ML013346
08 07 06 03 02 00
1 1 1 1
ML013347
VME Interface 10–25