Scsi Control Status Registers; Pci Configuration Block - DEC Digital Alpha VME 4/224 User Manual

Figure 8–4 PCI Configuration Block
Device ID = 0001h
Status
Class Code
N/S Don't Care
I/O Base Address (SCSI_IO_BASE)
Memory Base Address (SCSI_MEM_BASE)
Reserved
Reserved
N/S (=Not Supported)
Reserved
Reserved
X X
Operating registers mapped to bytes 80h to FFh.

8.2.5 SCSI Control Status Registers

The SCSI controller has 128 accessible bytewide CSRs, as shown in Table 8–2.
These registers are accessible starting at the following addresses:
• SCSI_IO_BASE in PCI I/O space
• SCSI_MEM_BASE in PCI memory space
For information about how to program these registers, see the PCI local bus
specification.
8–8 PCI bus
Vendor ID = 1000h : 00002000
Command : 00002004
Rev ID : 00002008
Latency Timer N/S : 0000200C
: 00002010
: 00002014
: 00002028
: 0000202C
: 00002030
: 00002034
: 00002038
X X : 0000203C
: 00002040 to 000020FC
ML013284